This invention relates to switching a clocked device from an initial frequency to a target frequency.
When switching the frequency of a device's internal clock from an initial to a target frequency, the target frequency should remain in phase with a master external clock. In microprocessors and other clocked devices, this is done using a phase locked loop ("PLL").
Typically, frequencies are changed in a clocked device by placing the device in an idle state, changing the frequency to the target frequency, and locking the device's PLL in phase with the target frequency. The length of the idle state required for the changing and locking to occur slows down device operation.